Interlaken IP Subsystem-High speed chip-to-chip interface protocol-AI/ML chip clusters-Interlaken IP core

About Interlaken IP Subsystem-High speed chip-to-chip interface protocol-AI/ML chip clusters-Interlaken IP core

Interlaken IP Subsystem High speed chip-to-chip interface protocol with scalable bandwidth, low latency and reliable data transfer over serial links. The latest generation supports up to 1.2Tbps bandwidth with support for NRZ and PAM4 serial links.
https://openfive.com/interlaken-ip-subsystems/

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Interlaken IP Subsystem, AI/ML chip clusters,High speed chip-to-chip interface protocol , Interlaken IP core

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